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Freescale Semiconductor /MKV56F24 /SystemControl /ID_ISAR4

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Interpret as ID_ISAR4

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)UNPRIV_INSTRS 0 (000)WITHSHIFTS_INSTRS 0 (0)WRITEBACK_INSTRS 0 (0)BARRIER_INSTRS 0SYNCHPRIM_INSTRS_FRAC 0 (0)PSR_M_INSTRS

PSR_M_INSTRS=0, WRITEBACK_INSTRS=0, BARRIER_INSTRS=0, WITHSHIFTS_INSTRS=000, UNPRIV_INSTRS=00

Description

Instruction Set Attributes Register 4

Fields

UNPRIV_INSTRS

Indicates the supported unprivileged instructions. These are the instruction variants indicated by a T suffix.

0 (00): None supported, ARMv7-M reserved.

1 (01): Adds support for the LDRBT, LDRT, STRBT, and STRT instructions.

2 (10): As for 1, and adds support for the LDRHT, LDRSBT, LDRSHT, and STRHT instructions.
WITHSHIFTS_INSTRS

Indicates the support for instructions with shifts

0 (000): Nonzero shifts supported only in MOV and shift instructions.

1 (001): Adds support for shifts of loads and stores over the range LSL 0-3.

3 (011): As for 1, and adds support for other constant shift options, on loads, stores, and other instructions.

4 (100): ARMv7-M reserved.
WRITEBACK_INSTRS

Indicates the support for Writeback addressing modes

0 (0): Basic support. Only the LDM, STM, PUSH, and POP instructions support writeback addressing modes. ARMv7-M reserved.

1 (1): Adds support for all of the writeback addressing modes defined in the ARMv7-M architecture.
BARRIER_INSTRS

Indicates the supported Barrier instructions

0 (0): None supported, ARMv7-M reserved.

1 (1): Adds support for the DMB, DSB, and ISB barrier instructions.
SYNCHPRIM_INSTRS_FRAC

Together with the ID_ISAR3[SYNCHPRIM_INSTRS] indicates the supported Synchronization Primitives
PSR_M_INSTRS

Indicates the supported M profile instructions to modify the PSRs

0 (0): None supported, ARMv7-M reserved.

1 (1): Adds support for the M-profile forms of the CPS, MRS, and MSR instructions, to access the PSRs.

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data